rz80 at transistor level
The chip's layout run as transistors in ngspice, from the latest transistor.yml run on main @ 30e9bf8 2026-10-23 05:37 UTC, the layout from Targets run 39799433058. All builds.
The whole chip, GlobalFoundries GF180MCU
The chip's layout extracted with Magic to its transistors and their wiring, and run in ngspice at each corner (tt, ss, ff): power-up, RESET, and a short program -- a memory read, a memory write, an I/O write and read -- at 4 MHz with 15 ns edges, its outputs into 100 pF (chip.py; on GitHub's runners by transistor.yml, each corner in windows of one job each). Its pins are checked against the RTL at every clock edge after RESET, and the cycles measured as the Z80 manual draws them; the figures below are each corner's: the switch over them changes the corner in place, the dimensions too.
| Corner | Pins against the RTL: mismatches | AC parameters met | Closest to its limit | Figures |
|---|---|---|---|---|
| tt | 0 | 25 of 25 | 21.8 ns TwWR | program · opcode fetch (M1) · memory read · memory write · I/O write · I/O read |
| ss | 0 | 25 of 25 | 18.4 ns TwWR | program · opcode fetch (M1) · memory read · memory write · I/O write · I/O read |
| ff | 0 | 25 of 25 | 23.6 ns TwWR | program · opcode fetch (M1) · memory read · memory write · I/O write · I/O read |
The datasheet's AC parameters: 25 of 25 met at every corner, over every cycle that has them
| # | Parameter | Limit | tt: SPICE (cycles) | ss: SPICE (cycles) | ff: SPICE (cycles) |
|---|---|---|---|---|---|
| 6 | TdCr(A) | ≤ 110 ns | 12.7 – 21.2 ns (16) STA 21.3 | 24.7 – 36.6 ns (16) STA 37.1 | 6.9 – 13.3 ns (16) STA 13.4 |
| 7 | TdA(MREQf) | ≥ 65 ns | 131.8 – 140.2 ns (10) STA 131.8 | 131.0 – 142.9 ns (10) STA 131.0 | 132.7 – 139.2 ns (10) STA 132.7 |
| 8 | TdCf(MREQf) | ≤ 85 ns | 27.9 – 28.1 ns (16) STA 28.2 | 42.6 – 42.9 ns (16) STA 43.1 | 21.0 – 21.2 ns (16) STA 21.1 |
| 9 | TdCr(MREQr) | ≤ 85 ns | 13.2 – 13.3 ns (5) STA 13.7 | 25.4 – 25.6 ns (5) STA 26.5 | 7.2 – 7.2 ns (5) STA 7.5 |
| 10 | TwMREQh | ≥ 100 ns | 139.8 – 139.8 ns (5) STA 139.5 | 142.3 – 142.4 ns (5) STA 141.6 | 138.9 – 139.0 ns (5) STA 138.6 |
| 11 | TwMREQl | ≥ 210 ns | 241.9 – 492.5 ns (10) STA 242.7 | 238.5 – 489.6 ns (10) STA 240.0 | 243.6 – 494.0 ns (10) STA 244.2 |
| 12 | TdCf(MREQr) | ≤ 85 ns | 19.9 – 20.4 ns (11) STA 20.8 | 31.4 – 32.2 ns (11) STA 33.1 | 14.8 – 15.1 ns (11) STA 15.3 |
| 13 | TdCf(RDf) | ≤ 95 ns | 27.8 – 27.9 ns (10) STA 27.7 | 42.4 – 42.6 ns (10) STA 42.3 | 20.9 – 21.0 ns (10) STA 20.8 |
| 14 | TdCr(RDr) | ≤ 85 ns | 13.0 – 13.1 ns (5) STA 13.2 | 25.2 – 25.3 ns (5) STA 25.7 | 7.1 – 7.1 ns (5) STA 7.2 |
| 19 | TdCr(M1f) | ≤ 100 ns | 20.6 – 20.7 ns (5) STA 21.2 | 35.7 – 35.8 ns (5) STA 37.0 | 13.0 – 13.0 ns (5) STA 13.4 |
| 20 | TdCr(M1r) | ≤ 100 ns | 12.5 – 12.5 ns (5) STA 13.7 | 24.3 – 24.3 ns (5) STA 26.5 | 6.8 – 6.8 ns (5) STA 7.5 |
| 21 | TdCr(RFSHf) | ≤ 130 ns | 20.6 – 20.7 ns (5) STA 21.4 | 35.7 – 35.9 ns (5) STA 37.2 | 13.0 – 13.0 ns (5) STA 13.4 |
| 22 | TdCr(RFSHr) | ≤ 120 ns | 12.6 – 12.6 ns (5) STA 13.9 | 24.4 – 24.4 ns (5) STA 26.9 | 6.8 – 6.8 ns (5) STA 7.6 |
| 23 | TdCf(RDr) | ≤ 85 ns | 19.8 – 20.2 ns (6) STA 20.4 | 31.1 – 32.0 ns (6) STA 32.3 | 14.7 – 15.0 ns (6) STA 15.1 |
| 24 | TdCr(RDf) | ≤ 85 ns | 21.0 – 21.0 ns (1) STA 20.9 | 36.5 – 36.5 ns (1) STA 36.4 | 13.3 – 13.3 ns (1) STA 13.2 |
| 26 | TdA(IORQf) | ≥ 180 ns | 250.5 – 250.7 ns (2) STA 249.8 | 250.8 – 251.1 ns (2) STA 249.7 | 250.3 – 250.5 ns (2) STA 249.9 |
| 27 | TdCr(IORQf) | ≤ 75 ns | 21.2 – 21.4 ns (2) STA 21.1 | 36.8 – 37.0 ns (2) STA 36.8 | 13.4 – 13.5 ns (2) STA 13.3 |
| 28 | TdCf(IORQr) | ≤ 85 ns | 20.3 – 20.7 ns (2) STA 20.6 | 31.9 – 32.7 ns (2) STA 32.8 | 15.0 – 15.3 ns (2) STA 15.2 |
| 29 | TdD(WRf)_memory | ≥ 80 ns | 249.3 – 249.3 ns (1) STA 248.4 | 248.7 – 248.7 ns (1) STA 247.0 | 249.6 – 249.6 ns (1) STA 249.0 |
| 30 | TdCf(WRf) | ≤ 80 ns | 27.8 – 27.8 ns (1) STA 27.6 | 42.5 – 42.5 ns (1) STA 42.2 | 21.0 – 21.0 ns (1) STA 20.8 |
| 31 | TwWR | ≥ 220 ns | 241.8 – 624.1 ns (2) STA 242.7 | 238.4 – 620.4 ns (2) STA 240.0 | 243.6 – 626.7 ns (2) STA 244.3 |
| 32 | TdCf(WRr) | ≤ 80 ns | 19.6 – 20.0 ns (2) STA 20.3 | 30.9 – 31.6 ns (2) STA 32.2 | 14.6 – 14.8 ns (2) STA 15.0 |
| 33 | TdD(WRf)_io | ≥ -10 ns | 126.2 – 126.2 ns (1) STA 116.6 | 130.1 – 130.1 ns (1) STA 116.0 | 123.5 – 123.5 ns (1) STA 116.3 |
| 34 | TdCr(WRf) | ≤ 65 ns | 20.9 – 20.9 ns (1) STA 20.8 | 36.2 – 36.2 ns (1) STA 36.3 | 13.2 – 13.2 ns (1) STA 13.1 |
| 53 | TdCf(D) | ≤ 150 ns | 19.8 – 28.5 ns (2) STA 29.2 | 31.1 – 43.8 ns (2) STA 45.2 | 14.7 – 21.3 ns (2) STA 21.8 |
